Small pn-junction tunnel-diode semiconductor



Feb. 22, 1966 J. J. TIEM ANN 3,237,064

SMALL PN-JUNCTION TUNNEL-DIODE SEMICONDUCTOR Original Filed Dec. 9, 19602 Sheets-Sheet 1 /m/em0r: Jemme J. T/emcmn,

H/s A f/orney.

Feb. 22, 1966 J. J. TIEMANN SMALL PN-JUNCTION TUNNEL-DIODE SEMICONDUCTOR2 Sheets-Sheet 2 Original Filed Dec. 9, 1960 Fig. 4.

Voltage k mta Mm Q 7 a I/ A 0W 2 United States Patent 3 ,237,064 SMALLPN-JUNCTION TUNNEL-DIODE SEMICONDUCTOR Jerome J. Tiemann, Burnt Hills,N.Y., assiguor to General Electric Company, a corporation of New YorkOriginal application Dec. 9,1960, Ser. No. 74,815, now

Patent No. 3,197,839, dated Aug. 3, 1965. and this application Oct. 10,1963, Ser. No. 315,189

5 Claims. (Cl. 317234) This application is a division of my copendingapplication Serial Number 74,815, filed December 9, 1960, now Patent No.3,197,839, which is in turn a continuationdnpart of my applicationSerial Number 858,995, filed December 11, 1959, now abandoned.

This invention relates to semiconductor devices and in particular tosemiconductor diode devices of the type having a very narrow P-Njunction space charge region such that at low voltages the currenttherethorugh is determined essentially by the quantumm'echanicaltunneling process. Devices of this type are referred to as tunnel diodedevices. Such devices are to be distinguished from other known P-Njunction diodes wherein the diode current at low voltages is dueessentially to injection of minority charge carriers. Such'lattersemicondue tor diodes will be referred to hereinafter as injection typediodes as distinguished from tunnel diodes.

The term tunnel diode device is intended to include semiconductor diodedevices comprising a narrow P-IN junction space charge regionformed'between two similar semiconductive materials as well as devicescomprising such a junction space charge region formed between twodissimilar semiconductive materials, provided that the current at lowvoltages is determined essentially by the quantum mechanical tunnelingprocess.

One example of a semiconductor diode device of the type to which thisinvention relates comprises a P-N junction region formed betweendegenerate P-type conductivity and degenerate N-type conductivitysemiconductive material. Such a device has a narrow junction spacecharge region and exhibits a negative resistance regionin the lowforward voltage range of its current-voltage charac teristic. Devices ofthis type have been described in the booklet entitled Tunnel Diodes,published in November 1959 by Research Information Services, GeneralElectric Company, Schenectady, New York.

The use of the term degenerate in a semiconductor device is intended todenominate a body or region of semiconductive material, which if N-type,has substantially all of the states near the bottom of the conductionband occupied by electrons even at very low temperatures as shown on theFermi-level diagram for the semiconductive material. Similarly, if thesemiconductive material is P-type the term degenerate refers to a bodyor region wherein substantially all of the states in an appreciableregion near the top of the valence band are emptied of electrons. Statedin another way degenerate N-type semiconductor refers to a body orregion of semiconductive material containing a sufiicient concentrationofexcess donor impurities to raise the Fermilevel thereof to a value ofenergy higher than the minimum energy of the conduction band on a Fermienergy level diagram for the semiconductive material. Similarly,degenerate P-type semiconductor refers to a body or region containing asufiicient concentration of excess acceptor impurities to depress theFermi-level thereof to an energy lower than the maximum energy of thevalence band on the Fermi energy level diagram for the semiconductivematerial. The Fermi-level in such energy level diagrams is the level atwhich the probability of finding an electron in a particular state isequal to one Divided 3,237,064 Patented Feb. 22, 1966 ICC half. Typicalenergy level diagrams for semiconductive materials may be found on pages78, 87, 90, 142, 164 and 165 of the text entitled Introduction toSemiconductors by W. Crawford'Dunlap, Jr., published in 1957 by JohnWiley and Sons, Inc., New York.

The concentration of donor or acceptor impurity necessary to render asemiconductive material degenerate depends upon the semiconductivematerial but is ordinarily greater than 10 atoms per cubic centimeter.In a practical semiconductor diode device of the type to which thisinvention relates fabricated from germanium, for example, the impurityconcentration is in the range of about 1X 10 to several times 10 atomsper cubic centimeter.

As used throughout the specification and in the appended claims thetermstunnel diode and narrow junction semiconductor diode respectively, areintended to denominate a semiconductor diode device having a narrowjunction space charge region such that the current at low voltages isdetermined essentially by the quantum mechanical tunneling process.Depending upon the relative concentration of activator impurities in theP-type and N-type conductivity semiconductive material such a device mayor may not exhibit a negative resistance characteristic at low forwardvoltages. The term narrow as used with respect to a P N junction refersto the width of the space charge region separating adjacent regions ofopposite-conductivity type normal to the plane of the P-N junction.

Semiconductor devicesof the type described above have low impedance anda high shunt capacitance. At high frequencies, this places extremerequirements on the external circuit. For example, the shunt capacitanceis difficult to neutralize and the low impedance of the deviceaggravates the difficulties due to lead inductance. Such devices alsovary considerably'in their electrical properties. For example, theconductivity of diiferent devices often varies widely. For many circuitapplications this is most undesirable since,- in many cases, deviceshaving substantially the same characteristics are required.

It is an object of this invention, therefore, to provide tunnel diodedevices which overcome one or more of the disadvantages of the typedescribed.

It is another object of this invention to provide an accurate andinexpensive method of producing tunnel diode devices having lowcapacitance and low seriesre'sistance.

It is another object of this invention to provide a method offabricating a tunnel diode device particularly suitable for use at highfrequencies.

It is a further object of this invention to provide a method ofreproducibly providing tunnel diodes having predetermined electricalcharacteristics.

Briefly stated, in accord with one aspect of this invention the methodof fabricating a narrow junction semiconductor diode device having arestricted junction area, comprises providing a degenerate semiconductorbody of one-conductivity type and securing it to a metallic base plate.A dot of impurity material capable of imparting to the semiconductorbody opposite-type conductivity is alloyed to the body and forms arecrystallized region of degenerate semiconductor ofopposite-conductivity type.

A relatively large electrode is connected to'the alloyed impuritymaterial and the unit so formed is then subjected to'a controlled andmonitored electrolytic etching treatment. A current distribution patternis established in the etching bath such that the greatest amount ofetching takes place in the region of the junction in the semiconductorbody. The etching treatment is continued until the device exhibits acurrent-voltage characteristic having a predetermined peak current.

The novel features which I believe to be characteristic of my inventionare set forth with particularity in the appended claims. My inventionitself, however, together with further objects and advantages thereofwill best be understood by reference to the following description, takenis conjunction with the accompanying drawings, in which:

FIGS. 1 and 2 are diagrammatic section-a1 views of a narrow junctionsemiconductor diode at different stages of fabrication by the method ofthis invention,

FIG. 3 is an illustrative view showing a type of apparatus suitable forthe preferential, controlled and monitored electrolytic etchingtreatment of this invention,

FIG. 4 illustrates the current-voltage characteristic curve of a narrowjunction degenerate semiconductor diode device, and

FIG. 5 is a diagrammatic sectional view of a low inductance deviceconstructed in accordance with the present invention.

Semiconductor junction diode devices of the narrow junction or tunneltype may exhibit a negative resistance at low forward voltages. Thevoltage range over which this negative resistance region may appearvaries depending upon the semiconductive material from which the devicehas been fabricated. For example in a germanium device this range isfrom about 0.04 to 0.3 volt; for a silicon device the range is fromabout 0.08 to 0.4 volt, for a gallium antimonide device the range isfrom about 0.03 to 0.3 volt and for gallium arsenide the range is fromabout 0.12 to 0.5 volt.

The interpretation of the negative resistance phenomenon is based on thefact that carries can cross the junction by means of the quantummechanical tunneling process. In order for this to be a likely process,however, the junction must be narrow, because the dependence of thebarrier penetration factor on the barrier thickness is very strong. Toprovide tunnel diode devices of the highest quality, therefore, it isdesirable that the junction be made very narrow. For example, in a highquality germanium tunnel diode the junction may be about 100 angstromunits wide. Such a narrow junction has a greater current carryingability than a wider one; however, the capacitance thereof is alsogreater. Such high quality tunnel diode devices, therefore, are found tohave low impedance and high shunt capacitance. This is an extremelyundesirable combination especially for high frequency applications. Inmany cases, for example, requirements of the external circuit are severebecause of the low impedance of the device. In addition, the frequencylimit of a circuit utilizing such a device is lowered because of thehigh shunt capacitance. The problems associated with the inductance ofthe device, due to its electrodes, are further aggravated by its lowimpedance. It is extremely desirable, therefore, to reduce these adverseeffects.

I have found that while the capacitance of a junction varies inverselywith its width, its current carrying ability per unit area also variesinversely with its width but at a much faster rate. For this reason, anarrow junction is capable of carrying more current per unit of junctioncapacitance than a wider one.

In accord with this invention, therefore, adverse effects of the narrowjunction are substantially eliminated by preferentially reducing thearea of the junction by an inexpensive, accurately controlled andmonitored electrolytic etching treatment while at the same timemaintaining a large body area and large electrodes. Since the junctioncapacitance is substantially determined by the product of a constanttimes the area, reducing the junction area effectively reduces thecapacitance. This invention provides a method, utilizing a controlledand monitored electrolytic etching treatment after the device has beenmounted in a suitable package, which reduces the junction region at afaster rate than the remainder of the body until a device is obtainedhaving particular predetermined electrical properties.

By this method a tunnel diode device is provided having a junctioncross-sectional area which may be made very small relative to thecross-sectional area of its body. This results in a device having lowseries impedance, due to the relatively large bulk of the body, and lowcapacitance due to the extremely small junction area.

In accord with the present invention, a tunnel diode device ofdegenerate semiconductive material is fabricated in the followingmanner:

In the present description it will be assumed that N- type germanium isused for the semiconductor body of the device to be fabricated. It willbe recognized, however, that the method set forth herein is equallyapplicable to any N or P-type semiconductor and may be applied to othersemiconductors such as silicon, silicon carbide, Group III-V compoundsand Group II-VI compounds, for example. 1

Initially, a body of germanium is provided which has been impregnatedwith a donor impurity, such as for example, by adding germaniumphosphide to a melt in conventional manner to impart N-type conductivitythereto. The impurity concentration must be at least enough .to renderthe semiconductor body degenerate, and can be as high as the limit ofsolubility of the impurity in the semiconductor body will allow. Theimpurity concentration preferred for germanium degenerate is in therange of about 1 10 atoms per cubic centimeter and may be as high asseveral times 10 atoms per cubic centimeter.

In FIG. 1, semiconductor body 1 is connected to a metallic broad areabase plate 2 which serves as a first electrode connection for thedevice. The plate is selected to have a coefiicient of thermal expansionsubstantially equal to that of the body. Such materials are well-knownin the art. A suitable base plate for germanium, for example, is afernico containing by weight 54% iron, 29% nickel and 17% cobalt.Another suitable base plate having a coefficient of expansionapproximately equal to that of germanium is a plate of gold-coatedmolybdenum. The body is soldered or otherwise connected to the baseplate with a solder 3 containing an amount of a donor impurity such asantimony, to insure good nonrectifying contact.

A small quantity or dot of acceptor impurity material 4 such as indiummixed with gallium is placed on the opposite side of the body and heatedto a temperature above the melting point of the impurity material. Thetemperature may be in the range of about 300 C. to 800 C. At thistemperature the liquid acceptor impurity dissolves some of the germaniumand forms a germanium-impurity solution which is progressively enrichedwith germanium by dissolution of the body until a solution is formedwhich has a melting point equal to the operating temperature. When thebody is then cooled, recrystallization takes place and a single crystallayer 5 of germanium is formed on the base from which it was removed bythe impurity material. This recrystallized germanium, however, is nowheavily impregnated with acceptor impurity material and therefore hasopposite or P-type conductivity. The two regions are sep arated by anarrow junction 6. Solid dilfusion causes the impurities in thebody tospread out over a distance which depends upon the time and temperatureof heating. At temperatures in the range of about 400 C. to 700 C., forexample, the time of heating may be from a few milliseconds to a fewminutes.

Besides indium, a wide variety of other activator materials or mixturesof other materials may be used, providing their solubility in thesemiconductor body is sufiicient to make the semiconductor degenerate.Indium is particularly suitable because it is soft, and strains due tothe alloying process have less effect on the germanium body than strainsinduced by some other materials. Further, solidification of the indiumsets up a minimum of stress which might crack or damage the germaniumbody. In addition, indium acts as a low melting point solder forattaching a lead to the alloy.

The small quantity of impurity material may-be placed on the body insolid, liquid or vapor form. The important feature in the formation ofthe junction is heating in contact with the impurity material. A secondelectrode 7 is connected to the alloyed impurity material dot 4. Thismay be, for example, by soldering or by pressing a wire into theimpurity material where contact is desired. Alternatively, electrode 7may be a broad area electrode suitably connected to dot 4.

The unit thus formed is then mounted in a holder by connecting electrodebase plate 2 and electrode 7 to support members 8 and 9 respectively.The support members can be utilized further to provide connection of thedevice to an external circuit, if desired. For example, the holder maybe a header, such as are well-known in the art for mounting transistorsand the like. Any strains which have been set up in the electrode 7 dueto the soldering or other connecting process are removed to minimize thetendency of the lead to become separated from the alloyed impuritymaterial or cause any strain on the junction. This may be done byremoving thermal stresses by annealing the electrode 7 or by mechanicalmeans whereby compression is set up between the electrode 7 and theimpurity material dot 4 tending to maintain the connection. This assuresthat there are no forces present which would tend to fracture thejunction after it has been reduced to a small size. This mechanicalmeans may be, for example, by lightly spreading the support membersapart before connecting electrode 7 and, after this connection, removingthe force. The support members are spread in such a direction thatrelease of the spreading force results in a compression between theelectrode and the connection to the alloyed impurity. This may be eitherin addition to, or in place of, annealing the electrode. The electrodemay be conveniently annealed by a pulse of current sufiicient to heatthe electrode to incandescence. The unit is thus held in a manner freefrom strain, especially at the electrodeimpurity material contact area.

This strain free mounting is required since, when a junction is reducedto a very small size, of the order of .001 inch diameter or less, forexample, the junction is very fragile and the above mounting assuresstrainfree mechanical support before any reduction of its cross sectiontakes place. When the junction area is reduced only a small amount as,for example, in providing matched units, and where the impedance levelis not required to be high, the strain-free mounting may be dispensedwith, if desired, since in such a case the junction may be relativelylarge and strong and small strains in the electrode connection are notso likely to cause damage thereto.

In further accord with my invention, I provide for reducing the area ofthe P-N junction and shaping the body of the device to achievepredetermined electrical characteristics by a controlled and monitoredelectrolytic etching treatment. It has been found that the side of a P-Njunction maintained at the higher potential with respect to theelectrolyte has the semiconductive material of its surface dissolved ata greater rate than the side of lower potential. In accord with thisetching treatment, therefore, the recrystallized P-type region ismaintained at a higher potential with respect to the electrolyte thanthe N-type region by connecting the positive side of the etching voltageto electrode 7 connected to alloy dot 4 and the negative side to theelectrolyte. A suitable etching voltage, for example, may be in therange of about 1 to 5 volts. By making a suitable connection ofelectrodes 2 and 7 to a monitoring means as, for example, acurrent-voltage characteristic tracing oscilloscope, the current-voltagecharacteristic of the device may be observed while the etching proceeds.One typical current-voltage characteristic tracing oscilloscope for videfor exhibiting the current'voltage characteristic of the device thereonin well-known manner.

The electrolyte utilized in the etching treatment is selected to providethat the semiconductive material of body 1 is dissolved but not thematerial of dot 4 or base plate 2. Many electrolytes are known in theart which will provide such action in an electrolytic etching treatment,a suitable one being, for example, a dilute aqueous solution ofpotassium hydroxide. Although the concentration of electrolyte is notcritical, it is preferable that the concentration be low enough toassure that current which shunts the PN junction through the electrolyteis not sufficient to interfere with the monitoring of thecurrent-voltage characteristic of the device. For an electrolyte ofpotassium hydroxide, for example, the range of concentration mayconveniently be in the range of about .01 percent to 10 percent.

During an electrolytic etching treatment, the semiconductive material isdissolved from all surfaces of the body. For example, a cube ofsemiconductive material subjected to such a treatment would be etchedsubstantially equally at all surfaces thereby resulting in a similarcube of smaller overall dimensions and ordinarily with any sharp cornersrounded. Since alloy dot 4 and metal base plate 2 are not dissolved bythe above etching treatment they serve to shield the surfacesthereunder. For example, where base plate 2 covers the entire baseregion of semiconductor body 1 no etching whatever takes place from thissurface. Alloy dot 4 likewise shields approximately the entire P-typeregion so that no etching can take place from the surface of the P-typeregion so shielded.

As the etching treatment progresses, however, more and more of theP-type material under dot 4 is removed since this material is beingsubstantially equally dissolved from those surfaces thereof which arenot physically covered by dot 4. As etching further progresses theelectrostatic shielding effect due to the equipotential of dot 4 reducesthe rate of etching thereunder; such shielding being more and moresignificant as the portion of the P-type region remaining is more fullyshielded by dot 4. Contact is always maintained, therefore, betweenalloy dot 4 and a portion of the P-type region thereunder untilvirtually all of this P-type region is dissolved away by etching actionat the exposed surfaces. This results in a junction region of reducedcross section which joins alloy dot 4 and the bulk portion ofsemiconductor body 1. This is shown particularly in FIG. 2 of thedrawing. As shown therein the junction region may be made very small,even microscopically so. The N-type region in the immediate vicinity ofthe junction is likewise small but, since this region is dissolved bythe etching treatment at a slower rate than the recrystallized P-typere.- gion, it very rapidly increases in size with increasing distancefrom dot 4, thereby assuring a device having low series resistance. Ifthe recrystallized region is of N-type conductivity the positive side ofthe etching voltage is similarly connected thereto to provide that therecrystallized region is at a higher potential with respect to theelectrolyte than the other region thereby achieving the samepreferential etching.

As described in detail hereinbefore, reducing the area of the junctionlowers the peak current value of the device and also lowers thecapacitance of the junction. The small area junctions made possible bythe above controlled and monitored preferential etching treatment allowsdependable and economical fabrication of devices having low capacitanceand low series resistance. Because of the relationship between peakcurrent and junction capacitance the etching treatment may be stoppedwhenever the monitor means indicates by a particular peak current thatthe device has the predetermined desired electrical characteristics. Inaddition, devices having uniform electrical characteristics may belikewise readily provided.

In accordance with this method, therefore, the mounted unit, generallydesignated at 10 in FIG. 3 is placed in an electrolytic etchingapparatus generally designated at 12, with the positive side of theetching voltage source connected to electrode 7 contacting dot 4. Theother side of the voltage source is connected to electrolyte 14.Electrolyte 14 may be an aqueous solution of potassium hydroxide orequivalent material which will electrolytically etch the semiconductivematerial of body 1 but not the material of dot 4 or base plate 2. Asdescribed in detail hereinbefore this arrangement produces currentpaths, due to the shielding effect of dot 4 and the potential gradientin the semiconductor body 1, which causes the PN junction region to bereduced at a faster rate than the bulk of the body. When thesemiconductor body 1 is originally relatively thin, which is usually thecase in fabricating a practical device, the device, after suitableetching, has a generally conical configuration with the small diameterof the cone at the junction region and the large diameter at the baseplate. Since the material of dot 4 and the electrode in contacttherewith is not dissolved during the etching treatment, the areathereof is maintained large with respect to the now reduced junction.

Monitor means, such as current-voltage characteristic tracingoscilloscope 20, is connected to electrodes 2 and 7 to allow for theobservation of the current-voltage characteristic of the device asetching progresses. Such monitoring allows for accurate reproduction ofdevices having matched electrical characteristics, and for accuratelydetermining when desired electrical properties have been obtained. Thismay be accomplished, for example, by observing the current-voltagecharacteristic of the device during the etching treatment andcontrolling the etching current to obtain a characteristic having aparticular peak current. As shown hereinbefore, there is a relationshipbetween the peak current and the capacitance of the junction as well asbetween the peak current and the area of the junction. This observedpeak current, therefore, gives an accurate indication of the electricalproperties of the device. As used throughout the specification and inthe appended claims the term peak current refers to the maximum currentjust before the negative resistance region of the current-voltagecharacteristic of the device. This is shown clearly in FIG. 4 whichillustrates a typical current-voltage characteristic of a device of thistype.

Observation of the characteristic curve on the oscilloscope, or othermonitoring means, indicates the progress of the etching treatment bychanges in the electrical characteristics of the device. For example, asthe junction area is reduced the device will have a characteristic curvewith a lower peak current. By controlling the etching current in accordwith these observations, the rate of etching may be accurately regulatedto provide extreme accuracy and reproducibility of devices havingsubstantially the same impedance level and junction area. The etching iscontinued until a predetermined characteristic is observed or until apredetermined junction area has been obtained.

The peak current as observed on the monitored characteristic curvedetermines the impedance level of the device. When matched devices aredesired, therefore, the etching is observed and continued until acurrentvoltage characteristic having a predetermined peak current hasbeen reached, resulting in units having exactly the same impedancelevel. This can be accomplished with extreme accuracy, for example, bycontrolling and interrupting the etching current when a characteristicwith this desired current value has been reached. It is desired to havean extremely small area junction to provide the lowest capacitance,which is desirable for high frequency applications, monitoring thedevice and controlling the etching current to regulate the etching rateprovides for accurate production of devices having any desired smallatmosphere.

diameter junction without the danger of etching the junction completelyaway. I

For higher frequency applications such as in the microwave and superhighfrequency ranges it is desired to eliminate substantially all externalinductance from the device in addition to having the shunt capacitanceof the device as small as possible. In such applications, for example,resonant cavities are utilized rather than lumped inductances andcapacities.

In accord with another embodiment of this invention such a device isfabricated by a two-step process. First, the device is fabricated inaccordance with the method outlined above with care being taken that allstrains are removed from electrode 7 after mounting in the header andbefore the preferential electrolytic etching treatment. This isimportant since, for the higher frequency appli cations, the junctioncapacitance must be as low as possible and the junction must be etchedto a very small diameter sometimes almost microscopically small whichleaves it extremely fragile.

Referring now to FIG. 5, after the mounted unit 10 has had its junctionreduced to the predetermined small size it is encased in a hardenableinsulating material 22 to give complete mechanical support to thefragile junction. The material used, for example, may be a low meltingglass or an epoxy resin. When the insulating material has hardened theencased device is removed from the header and mounted in a lowinductance package.

In the low inductance package a first conducting plate 24 is connectedto the metal base plate 2. A second conducting plate 26 is thenconnected to the opposite side of the device by clipping electrode 7 asshort as possible and connecting it to plate 26 as shown. The twoconducting plates are separated by insulating spacers 27 and 28 whichmay be of glass or any other insulating material suitable for :highfrequency purposes.

The two-step process allows the tunnel diode device to be subjected tothe preferential etching treatment while mounted in a substantiallystrain-free header or other mounting package and the junction reduced toa very small size while at the same time having adequate mechanicalsupport. While so supported, the preferentially etched device is encasedin a hardenable insulating material to assure that the device will bemechanically strong. The encased device may then be removed from theheader mounting and installed in the low inductance package withoutdanger of damage to, or fracture of, the fragile junction. Such mountednarrow junction semiconductor diodes, for example, have been made tooscillate at frequencies in excess of 1500 mc.

In accord with a specific example of the method of this invention, anarrow junction semiconductor diode device is fabricated in thefollowing manner:

A small body of germanium about 40 mils square and 10 mils in thicknessimpregnated with 4 10 phosphorous atoms per cubic centimeter to renderit degenerate and of N-type conductivity is soldered to a fernico baseplate as described hereinbefore, etched with CP4 etchant, rinsed anddried. The solder used is impregnated with a small quantity of antimonyto assure a good nonrectifying contact. A dot of indiurn plus 2 atompercent gallium is placed on the surface of germanium opposite the baseplate and alloyed in a furnace in a hydrogen The temperature of thefurnace is raised to 575 C. This temperature is held for 10 seconds andthen reduced slowly, about 1 per second, to 500 C. At 500 C. a 2 milplatinum wire is inserted into the liquid indium-gallium dot and theassembly cooled and removed from the furnace.

The fernico base plate and the platinum wire are then soldered tosupport wires in a header of the type wellknown for mountingtransistors. The unit is rinsed, etched slightly in (3P4 etchant,re-rinsed and dried. A pulse of alternating current is passed throughthe diode to heat the platinum wire to incandescence to anneal it andremove any strains therefrom.

The mounted unit is then preferentially electrolytically etched in apercent solution of potassium hydroxide with the positive side of theetching voltage connected to the indium-gallium dot 4. The etchingvoltage applied between electrode 7 and the electrolyte 14 is about 2volts. The progress of the etching is monitored during the etchtreatment by displaying the current-voltage characteristic curve of thedevice on a Techtronix model No. 575 characteristic curve tracingoscilloscope. The etching is discontinued when the peak current, asobserved on the oscilloscope is 1 milliampere. The device so fabricatedhas a capacitance of 5 mmf., a series resistance of 1 ohm and a junctiondiameter of 0.4 mil. This represents a shunt capacitance about %4() thatof the junction before etching.

For example, a typical prior art tunnel diode device has the followingvalues at 25 C.:

Peak current 6 ma.

Valley current 3 ma.

Junction diameter 1.64 1() cm. Capacitance 1200 mmf.

A specific example of a tunnel diode device fabricated in accordancewith my invention and before the etching treatment has the followingvalues at 25 C.:

Peak current 250 ma. Valley current 50 ma. Junction diameter 1.64 1O cm.Capacitance a. 1200 mmf.

After the controlled and monitored preferential etching treatment ofthis invention the following values were found:

Peak current 1 ma. Valley current 0.2 ma. Junction diameter 1 10 cm.Capacitance 5 mmf.

Devices fabricated in accordance with this invention, therefore, exhibitcharacteristics of low capacitance and low series resistance. Also,since the electrode is connected before the etching treatment, a largeelectrode may easily be connected without danger of fracturing the bodyat the junction. This results in relatively low lead inductance sincethe lead may be provided many times larger in cross-sectional area thanthe junction itself. A desirable arrangement is one wherein theinductance of the lead is small with respect to the inductance of thejunction or that of an external circuit component. A device sofabricated has a much higher frequency limit than would be calculatedfor a uniform narrow junction device and the series resistance due tothe large body configuration is lower than would be expected from acylindrical junction.

While only certain preferred features of the invention have been shownby way of illustration, many modifications will occur to those skilledin the art and it is, therefore, to be understood that the appendedclaims are intended to cover all such modifications as fall within thetrue spirit and scope of this invention.

What I claim as new and desire to secure by Letters Patent of the UnitedStates is:

1. A semiconductor device comprising: a body of semiconductive materialhaving a small area P-N junction therein separating adjacent regions ofoppositeconductivity type impregnated respectively with excess donor andacceptor impurity to a concentration greater than about atoms per cubiccentimeter, said P-N junction being less than about 200 angstrom unitsso that the current at low voltages is determined essentially by thequantium mechanical tunneling process, said junction having a controlledpreferentially etched cross-sectional area which is small as compared tothe cross-sectional area of said body; and separate electrodescontacting said regions, each electrode having an area at least as largeas the area of said P-N junction.

2. A semiconductor device comprising: a body of semiconductive materialhaving an abrupt P-N junction therein separating adjacent regions ofdegenerate P-type and N-type conductivity, said body having apreferentially shaped generally conical configuration with the smalldiameter of said cone at the P-N junction region; and separateelectrodes in nonrectifying contact with said P-type and said N-typeconductivity regions, each of said electrodes having an area at least asgreat as the crosssectional area of said P-N junction region.

3. A semiconductor device comprising: a semiconductor body having anabrupt P-N junction therein less than about 200 angstrom units wideseparating adjacent regions of degenerate P-type and N-typeconductivity, said body having a preferentially etched cross-sectionwhich is large with respect to the cross section of said PN junctionregion; said device having a resistance substantially equal to that of acorresponding device of constant cross-section and having a capacitysubstantially less than that of said corresponding device and first andsecond electrodes contacting said P-type and N-type regionsrespectively, each of said electrodes having an area at least as greatas the cross-sectional area of said P-N junction.

4. A tunnel diode device comprising: a semiconductor body having anabrupt P-N junction therein separating adjacent regions of degenerateP-type and N-type conductivity, said body having a preferentially etchedcross section which is large with respect to the cross section of saidP-N junction region; first and second electrodes contacting said P-typeand said N-type regions respectively; a hardenable insulating materialencasing said body and supporting said P-N junction; and a pair of largearea conducting plates contacting said first and second electrodesrespectively, said plates being separated by insulating spacers.

5. A tunnel diode device comprising: a body of semiconductive materialwhose bulk is degenerate and of onetype conductivity; a first broad areaelectrode in nonrectifying contact with one surface of said body; a dotof opposite-type conductivity imparting material fused to the surface ofsaid body opposite said first electrode establishing a recrystallizedregion of opposite-type conductivity therein; a narrow P-N junctionseparating said regions and having a controlled preferentially etchedcross section which is small as compared to the bulk of said body toprovide said device wit-h predetermined electrical characteristics; saiddevice having a resistance substantially equal to that of acorresponding device of constant crosssection and having a capacitysubstantially less than that of said corresponding device and a secondelectrode in nonrectifying contact with said dot having across-sectional area at least as large as the cross-sectional area ofsaid junction.

References Cited by the Examiner UNITED STATES PATENTS 2,672,528 3/1954Shockley 3 l7-235 2,802,159 8/1957 Stump 317-235 2,946,935 7/1960 Finn317-234 2,972,092 2/ 1961 Nelson 317235 3,033,714 5/1962 Ezaki 317-2353,081,418 3/ 1963 Manintveld 317235 3,109,758 11/1963 Batdorf 317237JOHN W. HUCKERT, Primary Examiner.

JAMES D. KALLAM, Examiner.

1. A SEMICONDUCTOR DEVICE COMPRISING: A BODY OF SEMICONDUCTOR MATERIALHAVING A SMALL AREA P-N JUNCTION THEREIN SEPARATING ADJACENT REGIONS OFOPPOSITECONDUCTIVITY TYPE IMPREGNATED RESPECTIVELY WITH EXCESS DONOR ANDACCEPTOR IMPURITY OF A CONCENTRATION GREATER THAN ABOUT 1018 ATOMS PERCUBIC CENTIMETER, SAID P-N JUNCTION BEING LESS THAN ABOUT 200 ANGSTROMUNITS SO THAT THE CURRENT AT LOW VOLTAGES IS DETERMINED ESSENTIALLY BYTHE QUANTIUM MECHANICAL TUNNELING PROCESS, SAID JUNCTION HAVING ACONTROLLED PREFERENTIALLY ETCHED CROSS-SECTIONAL AREA WHICH IS SMALL ASCOMPARED TO THE CROSS-SECTIONAL AREA OF SAID BODY; AND SEPARATEELECTRODES CONTACTING SAID REGIONS, EACH ELECTRODE HAVING AN AREA ATLEAST AS LARGE AS THE AREA OF SAID P-N JUNCTION.